(1) Field of the Invention
The present invention relates to high-frequency power amplifiers and communication devices, and more particularly, relates to a high-frequency power amplifier and a communication device used for a wireless LAN terminal and a mobile terminal.
(2) Description of the Related Art
Heterojunction bipolar transistors (hereinafter referred to as HBT) and others are used for high-frequency power amplifiers as devices having high-frequency characteristics. In recent years, in wireless LAN terminals and mobile terminals, from the viewpoint of miniaturization, there has been a request for a technology for integrating the high-frequency power amplifiers using HBT into Microwave Monolithic IC (MMIC) and others and incorporating a high-frequency power amplifier transistor and a bias circuit and others into one chip. An example proposing the improvement on the characteristic of the high-frequency power amplifier including the bias circuit includes the high-frequency power amplifier disclosed in, for example, page 7, FIG. 3 of Patent Reference 1 (Japanese Unexamined Patent Application Publication No. 2004-40500). FIG. 16 illustrates the structure.
The circuit in FIG. 16 includes two stages of high-frequency power amplifier transistors, and in the front-end stage, a bias supply transistor 41 is connected to a base of a transistor 31, and a bias circuit for supplying bias voltage, which is a resistor 52 is connected to a base of the bias supply transistor 41. Furthermore, diodes 71 and 72 each of which is a transistor whose base and collector are connected are connected between the connecting point of the bias supply transistor 41 and the bias circuit, and the reference potential. In the back-end stage, a bias supply transistor 44 is connected to a base of a transistor 32, and a bias circuit for supplying bias voltage, which is a resistor 57, is connected to a base of the bias supply transistor 44. Furthermore, diodes 73 and 74 having bases and collectors connected are connected between the connecting point of the bias supply transistor 44 and the bias circuit and the reference potential. Furthermore, a matching circuit 11 is inserted between an input terminal 01 of the high-frequency power amplifier and the high-frequency power amplifier transistor 31 in the front-end stage, a matching circuit 12 is inserted between the high-frequency power amplifier transistor in the front-end stage and the high-frequency power amplifier in the back-end stage, and a matching circuit 13 is inserted between an output terminal 02 and the high-frequency power amplifier transistor 32 in the back-end stage.
In this circuit structure, it is necessary to use the terminals in common in order to miniaturize the chip layout and reduce the number of external peripheral components. Thus, in the circuit structure having the terminals 22 and 23 in common, the electric power supplied to the bias supply transistor in the back-end stage particularly decreases at the time of high output operation, and thus the base-emitter voltage of the bias supply transistor 44 decreases, and the current supplied to the high-frequency power amplifier transistor 32 is likely to decrease. Furthermore, isolation between the bias supply transistors 41 and 44 is not secured, and operations such as oscillations are likely to be unstable. The same phenomenon is seen even when the terminals 22 and 23 are not commonly used.
Furthermore, another high-frequency power amplifier is disclosed in page 10, FIG. 1 of Patent Reference 2 (Japanese Unexamined Patent Application Publication No. 2002-9558), for example, and FIG. 17 shows the structure of the circuit. FIG. 17 illustrates high-frequency power amplifier transistors 31 and 32, first temperature compensation transistors 42 and 45 which apply currents to the high-frequency power amplifier transistors 31 and 32, according to the applied voltage to the bias voltage supply terminal, and second temperature compensation transistors 43 and 46 which compensates bias current supplied from the bias supply transistors 41 and 44 to the high-frequency power amplifier transistors 31 and 32, according to the current flowing in the first temperature compensation transistors 42 and 45. Resistors 51, 52, 53, 54, 55, 56, 57, 58, 59, and 60 are for adjusting bias current, the reference numeral 01 denotes an output terminal of the high-frequency amplifier, the reference numeral 02 denotes an output terminal of the high-frequency power amplifier, the reference numerals 11, 12, and 13 are matching circuits, the reference numerals 22, 23, 24 are power source terminals, and the reference numeral 21 is a control input terminal where a control signal is externally provided.
In this circuit configuration, instead of the bias circuits consisting of the resistors 51, 52, 56, 57 in FIG. 16, and the bias circuits consisting of the temperature compensation transistors 42, 43, 45 and 46 and the resistors 51, 52, 53, 54, 55, 56, 57, 58, 59, and 60 are connected, and the variation in bias current of the amplifier depending on the fluctuation in the input voltage can be suppressed.
The regulator generally supplies a regulated voltage to the power source, and thus the voltage variation width is relatively small. For example, when the voltage of 2.8V is supplied and the voltage fluctuation of the regulator is 5%, the voltage ranges from 2.66 V to 2.94 V, and the voltage width is approximately 0.3 V.
However, when no stable voltage is given from the regulator for some reason, or when the regulated voltage is not supplied within the device, the circuit is directly connected from a battery, which is the power source. In this case, the voltage variation width widens. Conventionally, in the circuit according to FIG. 16, stability regarding the fluctuation in the power source voltage is not secured, which causes a problem, that is, significant deterioration in linearity caused by decreased current at the time of high output operation.
Furthermore, in the circuit in FIG. 17 illustrating the prior art, the electric power supplied to the back-end bias supply transistor particularly decreases at the time of high output operation, and the base-emitter voltage of the bias supply transistor 44 decreases, and the current supplied to the high-frequency power amplifier transistor 32 decreases. This causes a problem, that is, the deterioration in linearity.
Furthermore, when the high-frequency power amplifier transistors are configured in multiple stages, as illustrated in FIG. 18, the bias supply transistors similar to the bias supply transistor 41 are provided in multiple stages with reference to the bias voltage determined by the temperature compensation transistors 42 and 43.
In FIG. 18, in the high-frequency power amplifier transistors 31, 32, and 31n, the bias supply transistors 41, 44, and 41n are provided each of which corresponding to the high-frequency power amplifier transistors 31, 32, and 31n. All of the bias supply transistors use the bias voltage of the bias circuit as a reference.
In this structure, when the electric power supplied to the bias supply transistors 41, 44, and 41n decreases at the time of high output, all of the bias supply transistors 41, 44, 41n and the base-emitter voltages of all of the high-frequency power amplifier transistors 31, 32, and 31n decrease. Thus, current supplied to the high-frequency transistor decreases, causing the deterioration in the linearity. The more the number of stages of the high-frequency power amplifier are, the more significant the deterioration in linearity appears.